2005 Microchip Technology Inc.
Preliminary
DS41265A-page 219
PIC16F946
MOVF
Move f
Syntax:
[ label ]
MOVF f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(f)
→ (dest)
Status Affected:
Z
Encoding:
00
1000
dfff
ffff
Description:
The contents of register ‘f’ is
moved to a destination dependent
upon the status of ‘d’. If ‘d’ = 0,
destination is W register. If ‘d’ = 1,
the destination is file register ‘f’
itself. ‘d’ = 1 is useful to test a file
register since status flag Z is
affected.
Words:
1
Cycles:
1
Example:
MOVF
FSR,
0
After Instruction
W=
value in FSR
register
Z=
1
MOVLW
Move Literal to W
Syntax:
[ label ]
MOVLW k
Operands:
0
≤ k ≤ 255
Operation:
k
→ (W)
Status Affected:
None
Encoding:
11
00xx
kkkk
Description:
The eight bit literal ‘k’ is loaded
into W register. The “don’t cares”
will assemble as ‘0’s.
Words:
1
Cycles:
1
Example:
MOVLW
0x5A
After Instruction
W
=
0x5A
MOVWF
Move W to f
Syntax:
[ label ]
MOVWF
f
Operands:
0
≤ f ≤ 127
Operation:
(W)
→ (f)
Status Affected:
None
Encoding:
00
0000
1fff
ffff
Description:
Move data from W register to
register ‘f’.
Words:
1
Cycles:
1
Example:
MOVWF
OPTION
Before Instruction
OPTION =
0xFF
W
=
0x4F
After Instruction
OPTION =
0x4F
W
=
0x4F
NOP
No Operation
Syntax:
[ label ]
NOP
Operands:
None
Operation:
No operation
Status Affected:
None
Encoding:
00
0000
0xx0
0000
Description:
No operation.
Words:
1
Cycles:
1
Example:
NOP
相关PDF资料
2-1546217-0 TERM BLK RCPT 20POS SIDE 5.08MM
1-1546217-9 TERM BLK RCPT 19POS SIDE 5.08MM
1-1546217-8 TERM BLK RCPT 18POS SIDE 5.08MM
1-1546217-7 TERM BLK RCPT 17POS SIDE 5.08MM
1-1546217-6 TERM BLK RCPT 16POS SIDE 5.08MM
1-1546217-5 TERM BLK RCPT 15POS SIDE 5.08MM
1-1546217-4 TERM BLK RCPT 14POS SIDE 5.08MM
1-1546217-3 TERM BLK RCPT 13POS SIDE 5.08MM
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